NRZ-L and NRZ-I: The Foundation of Line Coding - Line Coding - Basics | OneNoughtOne

0/240

Computer NetworksLine Coding Basics

Line Coding - Basics

LevelIntermediate

Duration75 mins

TopicLine Coding Basics

1 / 5

NRZ-L and NRZ-I: The Foundation of Line Coding

From Bits to Signals: The First Step in Digital Transmission

When we speak of 'digital transmission,' we often think abstractly about ones and zeros flowing through cables and airwaves. But here's a fundamental truth that transforms how you think about networking: bits don't travel on wires—electrical signals do.

This simple observation reveals one of the most critical challenges in computer networking. You have data—a stream of binary digits representing text, images, video, or any digital information. You need to transmit this data across a physical medium—a copper wire, a fiber optic cable, or electromagnetic waves. The question is: How do you represent binary digits as physical signals that can traverse these media?

The answer lies in line coding, and it all begins with the most intuitive approach possible: Non-Return-to-Zero (NRZ) encoding.

What You Will Learn

By the end of this page, you will understand the NRZ-L and NRZ-I line coding schemes in complete depth—their signal representations, encoding algorithms, advantages, limitations, and real-world applications. You'll see why these seemingly simple techniques remain foundational despite their known shortcomings, and how they paved the way for more sophisticated encoding methods.

Understanding Line Coding

Before diving into NRZ specifically, let's establish precisely what line coding means and why it exists.

Line coding is the process of converting a sequence of binary data bits into a digital signal suitable for transmission over a physical medium. It defines the relationship between bit patterns and signal patterns—essentially creating a language that both the transmitter and receiver understand.

Why is line coding necessary?

Consider what happens without standardized line coding:

The transmitter might represent '1' as +5V and '0' as 0V
The receiver might expect '1' as +3.3V and '0' as -3.3V
Different timing assumptions could cause bits to be misinterpreted
Without clear transitions, the receiver's clock could drift from the transmitter's clock

Line coding solves these problems by defining:

Voltage levels or signal states for each bit pattern
Timing relationships between signal transitions and bit boundaries
Synchronization mechanisms to keep transmitter and receiver aligned
Error handling characteristics that affect detectability of transmission errors

Line Coding Design Goals

•Spectral Efficiency — Maximize data throughput for a given bandwidth allocation
•Self-Synchronization — Allow the receiver to extract timing information from the signal itself
•Error Detection — Enable identification of transmission errors through signal properties
•DC Balance — Minimize or eliminate DC (zero-frequency) components in the signal spectrum
•Noise Immunity — Resist corruption from electromagnetic interference and signal degradation
•Implementation Simplicity — Keep encoding and decoding circuitry practical and cost-effective

The Return-to-Zero Reference

The term 'Non-Return-to-Zero' implies the existence of 'Return-to-Zero' encoding. In RZ encoding, the signal returns to a zero (neutral) voltage level in the middle of each bit period. NRZ schemes, by contrast, maintain their voltage level throughout the entire bit period—hence 'non-return.' This distinction has profound implications for bandwidth usage and synchronization.

NRZ-L (NRZ-Level): The Intuitive Approach

NRZ-L (Non-Return-to-Zero Level) is the most intuitive line coding scheme. The voltage level directly represents the bit value:

Binary 1 → One voltage level (typically positive, e.g., +V)
Binary 0 → Another voltage level (typically negative or zero, e.g., -V or 0V)

This is exactly how most people would naturally think about encoding binary data as electrical signals.

Signal Characteristics:

In NRZ-L encoding:

The signal level is constant throughout each bit period
A transition (level change) occurs only when the bit value changes
Long sequences of identical bits produce a flat signal with no transitions
The signal level at any moment directly indicates the current bit value

Converting Mermaid diagram...

NRZ-L Encoding Rules
Binary Value	Voltage Level	Signal Behavior	Example Application
1	+V (positive)	High level maintained for entire bit period	RS-232, EIA-232 serial communication
0	-V or 0V	Low level maintained for entire bit period	TTL logic level signaling

Encoding Algorithm:

For each bit in the data stream:
    If bit = 1:
        Set signal level = +V for entire bit duration
    If bit = 0:
        Set signal level = -V (or 0V) for entire bit duration
    Advance to next bit period

Decoding Algorithm:

For each bit period:
    Sample signal level at center of bit period
    If sample > threshold:
        Decoded bit = 1
    Else:
        Decoded bit = 0

Implementation Simplicity:

NRZ-L's greatest strength is its simplicity. The encoding logic is trivial—essentially a direct mapping from bit value to voltage. Decoding requires only voltage comparison against a threshold. This makes NRZ-L:

Inexpensive to implement in hardware
Easy to understand and troubleshoot
Suitable for short-distance, low-speed communication

Historical Significance

NRZ-L was the dominant encoding scheme in early computer systems and serial communications. The RS-232 standard, which connected computers to modems, printers, and terminals for decades, uses NRZ-L encoding. Its simplicity made it ideal when processing power and component costs were prohibitive.

NRZ-I (NRZ-Inverted): Differential Encoding

NRZ-I (Non-Return-to-Zero Inverted), also known as NRZ-M (NRZ-Mark), takes a fundamentally different approach. Instead of the voltage level representing the bit value, the presence or absence of a transition represents the bit:

Binary 1 → Signal transition (inversion) at the beginning of the bit period
Binary 0 → No transition; signal level remains unchanged

This is a form of differential encoding, where information is encoded in the change between states rather than the states themselves.

Why 'Inverted'?

The name comes from the fact that a '1' bit causes the signal to invert (flip from high to low, or low to high). The actual voltage level at any moment doesn't directly indicate the bit value—you must observe whether a transition occurred.

Signal Characteristics:

In NRZ-I encoding:

A transition always occurs at the beginning of a bit period containing '1'
No transition occurs for '0' bits
Long sequences of zeros produce a flat signal (just like NRZ-L sequences of same bits)
Long sequences of ones produce regular transitions at every bit boundary

Key Insight:

NRZ-I is self-clocking for sequences containing '1' bits. Every '1' creates a transition that the receiver can use for timing synchronization. However, long sequences of '0' bits still pose synchronization challenges.

Converting Mermaid diagram...

NRZ-I Encoding Rules
Binary Value	Signal Behavior	Effect on Level	Synchronization Impact
1	Transition at bit start	Level inverts: +V ↔ -V	Provides clock edge for timing recovery
0	No transition	Level unchanged	No timing information; potential clock drift

Encoding Algorithm:

Initialize: current_level = +V (or -V, arbitrary starting point)

For each bit in the data stream:
    If bit = 1:
        current_level = invert(current_level)  // +V → -V or -V → +V
    // If bit = 0: do nothing, level stays the same
    Output current_level for entire bit duration
    Advance to next bit period

Decoding Algorithm:

For each bit period:
    Compare signal level at bit start with previous level
    If transition detected:
        Decoded bit = 1
    Else:
        Decoded bit = 0

Polarity Independence

A crucial advantage of NRZ-I: if the signal wires are accidentally swapped (polarity reversed), the data is still correctly decoded! Since information is in the transitions, not the absolute levels, swapped polarity merely inverts all the voltage levels—but transitions still occur in the same places. NRZ-L, by contrast, would decode all data incorrectly with reversed polarity.

NRZ-L vs NRZ-I: A Detailed Comparison

Understanding when to use NRZ-L versus NRZ-I requires analyzing their differences across multiple dimensions. Both schemes share the fundamental NRZ property—the signal never returns to zero within a bit period—but their encoding philosophies lead to distinct characteristics.

Comprehensive NRZ-L vs NRZ-I Comparison
Characteristic	NRZ-L	NRZ-I
Encoding Type	Level encoding (voltage = bit)	Differential encoding (transition = 1)
Polarity Sensitivity	Highly sensitive; swapped wires corrupt all data	Polarity independent; swapped wires still work
Synchronization	No synchronization capability built-in	Partial; '1' bits provide clock transitions
DC Component	Present; long runs of 1s or 0s create DC bias	Present; long runs of 0s create DC bias
Baseline Wandering	Severe for unequal 1s and 0s	Moderate; only 0-runs cause issues
Implementation	Simpler; direct bit-to-voltage mapping	Slightly complex; requires state tracking
Error Impact	Single bit error affects one bit	Single transition error may affect subsequent bits
Bandwidth	Efficient; minimum bandwidth = bit rate / 2	Same efficiency as NRZ-L
Common Usage	RS-232, EIA-232, short-distance serial	USB 2.0 (low/full speed), magnetic recording

NRZ-L Advantages

•Simplest possible encoding logic
•Minimal hardware requirements
•Easy signal analysis and debugging
•Single-bit error isolation
•Widely understood and documented

NRZ-I Advantages

•Polarity independent operation
•Self-clocking for data with many 1s
•Better for twisted pair cables
•Easier clock recovery in some scenarios
•Foundation for more advanced differential schemes

Critical Limitation: Both Schemes Struggle with Long Runs

Neither NRZ-L nor NRZ-I handles long runs of identical bits well. NRZ-L fails on any repeated bit (1111... or 0000...) while NRZ-I fails specifically on zeros (0000...). This fundamental limitation drove the development of Manchester encoding and bipolar schemes, which we'll study in subsequent modules.

Bandwidth Analysis and Spectral Properties

Understanding the bandwidth requirements of NRZ encoding is essential for system design. The theoretical minimum bandwidth for any digital signal relates to the Nyquist theorem, but practical considerations add complexity.

Theoretical Bandwidth:

For NRZ encoding at bit rate R bits per second:

Minimum bandwidth (ideal case): B = R/2 Hz
Practical bandwidth: B ≈ R Hz (to preserve signal shape adequately)

This 2:1 ratio (bit rate to minimum bandwidth) makes NRZ one of the most bandwidth-efficient encoding schemes. Compare this to Manchester encoding, which requires bandwidth equal to the bit rate (B = R), effectively halving capacity.

Spectral Energy Distribution:

The frequency spectrum of an NRZ signal depends on the data pattern:

Data Pattern	Dominant Frequency	Signal Characteristic
Alternating (101010...)	R/2 Hz	Maximum transitions, best for sync
Random 50/50 mix	Spread around R/2 Hz	Typical case
Long runs (111...000...)	Near DC (0 Hz)	Worst case for coupling

nrz_bandwidth_demo.py
Python
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
import numpy as np
import matplotlib.pyplot as plt
from scipy import fft
 
def generate_nrz_l_signal(bits, samples_per_bit=100):
    """Generate NRZ-L signal from binary data."""
    signal = np.array([])
    for bit in bits:
        level = 1.0 if bit == 1 else -1.0
        signal = np.append(signal, np.ones(samples_per_bit) * level)
    return signal
 
def analyze_spectrum(signal, bit_rate, samples_per_bit):
    """Compute frequency spectrum of NRZ signal."""
    sample_rate = bit_rate * samples_per_bit
    n = len(signal)
    freq = np.fft.fftfreq(n, 1/sample_rate)[:n//2]
    magnitude = np.abs(np.fft.fft(signal))[:n//2]
    return freq, magnitude
 
# Example: Compare different data patterns
bit_rate = 1000  # 1000 bps
samples = 100
 
# Alternating pattern: maximum transitions
alternating = [1, 0, 1, 0, 1, 0, 1, 0, 1, 0] * 10
# Long runs: minimum transitions  
long_runs = [1]*50 + [0]*50
# Random: typical case
random_bits = list(np.random.randint(0, 2, 100))
 
# Generate signals and analyze spectra
for pattern, name in [(alternating, "Alternating"), 
                       (long_runs, "Long Runs"),
                       (random_bits, "Random")]:
    signal = generate_nrz_l_signal(pattern, samples)
    freq, mag = analyze_spectrum(signal, bit_rate, samples)
    print(f"{name}: Peak frequency at {freq[np.argmax(mag)]:.1f} Hz")
    # Peak should be near bit_rate/2 for alternating pattern

Bandwidth Efficiency Trade-off

NRZ's excellent bandwidth efficiency comes at a cost: no built-in synchronization. Schemes like Manchester sacrifice half their bandwidth (B = R instead of R/2) specifically to guarantee transitions for clock recovery. This is the fundamental bandwidth-synchronization trade-off in line coding design.

Real-World Applications and Standards

Despite their limitations, NRZ encoding schemes remain in active use across numerous applications. Understanding where and why they're used provides insight into practical engineering trade-offs.

NRZ-L Applications

•RS-232/EIA-232 Serial Communication — The classic serial port standard uses NRZ-L encoding. Start and stop bits provide framing, and the relatively low data rates (typically 9600-115200 bps) minimize synchronization issues.
•TTL/CMOS Digital Logic — Internal signals within digital circuits use level-based encoding. The short distances and synchronous clock distribution eliminate the need for self-clocking.
•Parallel Data Buses — Legacy parallel interfaces (parallel ports, IDE cables) use NRZ-L for each data line, relying on a separate clock line for synchronization.
•UART Communication — Universal Asynchronous Receiver/Transmitter chips use NRZ-L with start/stop bits for asynchronous serial communication.
•I²C (in terms of data encoding) — While I²C uses complex protocols, the underlying bit encoding follows NRZ principles with external clock.

NRZ-I (Differential) Applications

•USB 2.0 (Low and Full Speed) — Uses NRZI encoding with bit stuffing (inserting a 0 after six consecutive 1s) to guarantee regular transitions for clock recovery.
•Magnetic Recording (Hard Drives) — Traditional magnetic storage used NRZ variants because the read head detects flux transitions more reliably than absolute polarities.
•FDDI (Fiber Distributed Data Interface) — The 100 Mbps fiber network used NRZI encoding combined with 4B/5B coding to ensure adequate transitions.
•IrDA (Infrared Data) — Infrared communication uses NRZI-like encoding where pulses represent ones, leveraging the differential nature for noise immunity.
•Certain Industrial Protocols — Many industrial communication standards use differential NRZ for its noise immunity on long cable runs.

Why NRZ Persists

Even in modern systems, NRZ remains relevant where: (1) separate clock distribution exists, (2) data rates are low enough that synchronization isn't critical, (3) simplicity and cost are primary concerns, or (4) the protocol layer handles synchronization through bit stuffing or block coding.

Implementation Considerations

Implementing NRZ encoding and decoding requires attention to several practical considerations that textbooks often gloss over.

Voltage Level Selection:

The choice of voltage levels affects:

Signal-to-noise ratio (SNR): Larger voltage swings improve noise immunity but increase power consumption
Power consumption: Mobile and embedded devices often use reduced voltage swings (1.8V or 1.2V logic)
Compatibility: Equipment must agree on voltage levels or use level shifters

Common Voltage Configurations:

NRZ Voltage Level Standards
Standard	Logic 1 Level	Logic 0 Level	Application
TTL	+2.4V to +5V	0V to +0.8V	Legacy digital logic
LVTTL	+2.0V to +3.3V	0V to +0.8V	Modern logic ICs
RS-232	-3V to -15V	+3V to +15V	Serial communication
RS-485	Differential ±1.5V to ±6V	Differential	Industrial/long-distance
LVDS	±350mV differential	Common mode ~1.2V	High-speed differential

Timing and Sampling:

Reliable NRZ decoding depends critically on:

Sample Point Selection: The receiver samples the signal at the center of each bit period. Sampling too early or late increases error probability, especially with timing drift.
Clock Accuracy: Without self-synchronization, receiver and transmitter clocks must match closely. A 1% clock mismatch accumulates to half a bit period error after just 50 bits.
Edge Detection vs. Level Sampling: Some receivers use edge-triggered timing recovery (for NRZ-I) while others use level sampling (for NRZ-L).

Practical Clock Tolerance Calculation:

For reliable reception of N bits:
Maximum clock difference = (0.5 × bit_period) / N

Example: To receive 10 bits reliably:
Max difference = 0.5 / 10 = 5% clock tolerance

Example: To receive 100 bits (typical UART frame with start/stop):
Max difference = 0.5 / 100 = 0.5% clock tolerance

Crystal Accuracy Matters

This is why UART chips require reasonably accurate crystal oscillators. Cheap ceramic resonators (1-2% accuracy) work for short bursts, but reliable long-frame communication requires crystal accuracy (typically 0.01% or better). The NRZ encoding's lack of self-synchronization makes clock accuracy critical.

Summary: The Foundation of Line Coding

We've thoroughly examined the two fundamental NRZ encoding schemes that form the starting point for understanding all line coding techniques.

Key Takeaways

•Line coding translates bits to signals — It bridges the gap between abstract binary data and physical transmission media.
•NRZ-L uses voltage levels — Binary values directly correspond to high or low voltage levels; simple but polarity-sensitive.
•NRZ-I uses transitions — Binary 1 triggers a transition; polarity-independent but still struggles with long zero runs.
•Bandwidth efficiency is excellent — NRZ requires only R/2 Hz minimum bandwidth for R bps, making it spectrally efficient.
•Synchronization is the Achilles' heel — Neither scheme provides reliable self-synchronization, limiting their standalone use.
•Real-world use continues — Despite limitations, NRZ remains useful where simplicity is valued and sync is handled externally (RS-232, USB 2.0 with bit stuffing, etc.).

What's Next:

We've identified a critical problem with NRZ encoding: how does the receiver stay synchronized with the transmitter? Long runs of identical bits produce flat signals with no timing information. The next page explores self-synchronization—the mechanisms that allow receivers to extract clock information from the signal itself, and why NRZ's failure in this area motivated the development of more sophisticated encoding schemes.

Page Complete

You now understand NRZ-L and NRZ-I encoding in depth—their mechanisms, characteristics, trade-offs, and applications. This foundation prepares you to understand why synchronization is critical and how other line codes solve the problems NRZ leaves unaddressed.

Computer NetworksLine Coding Basics

Line Coding - Basics

LevelIntermediate

Duration75 mins

TopicLine Coding Basics

1 / 5

NRZ-L and NRZ-I: The Foundation of Line Coding

From Bits to Signals: The First Step in Digital Transmission

The answer lies in line coding, and it all begins with the most intuitive approach possible: Non-Return-to-Zero (NRZ) encoding.

What You Will Learn

Understanding Line Coding

Before diving into NRZ specifically, let's establish precisely what line coding means and why it exists.

Why is line coding necessary?

Consider what happens without standardized line coding:

The transmitter might represent '1' as +5V and '0' as 0V
The receiver might expect '1' as +3.3V and '0' as -3.3V
Different timing assumptions could cause bits to be misinterpreted
Without clear transitions, the receiver's clock could drift from the transmitter's clock

Line coding solves these problems by defining:

Voltage levels or signal states for each bit pattern
Timing relationships between signal transitions and bit boundaries
Synchronization mechanisms to keep transmitter and receiver aligned
Error handling characteristics that affect detectability of transmission errors

Line Coding Design Goals

•Spectral Efficiency — Maximize data throughput for a given bandwidth allocation
•Self-Synchronization — Allow the receiver to extract timing information from the signal itself
•Error Detection — Enable identification of transmission errors through signal properties
•DC Balance — Minimize or eliminate DC (zero-frequency) components in the signal spectrum
•Noise Immunity — Resist corruption from electromagnetic interference and signal degradation
•Implementation Simplicity — Keep encoding and decoding circuitry practical and cost-effective

The Return-to-Zero Reference

NRZ-L (NRZ-Level): The Intuitive Approach

NRZ-L (Non-Return-to-Zero Level) is the most intuitive line coding scheme. The voltage level directly represents the bit value:

Binary 1 → One voltage level (typically positive, e.g., +V)
Binary 0 → Another voltage level (typically negative or zero, e.g., -V or 0V)

This is exactly how most people would naturally think about encoding binary data as electrical signals.

Signal Characteristics:

In NRZ-L encoding:

The signal level is constant throughout each bit period
A transition (level change) occurs only when the bit value changes
Long sequences of identical bits produce a flat signal with no transitions
The signal level at any moment directly indicates the current bit value

Converting Mermaid diagram...

NRZ-L Encoding Rules
Binary Value	Voltage Level	Signal Behavior	Example Application
1	+V (positive)	High level maintained for entire bit period	RS-232, EIA-232 serial communication
0	-V or 0V	Low level maintained for entire bit period	TTL logic level signaling

Encoding Algorithm:

For each bit in the data stream:
    If bit = 1:
        Set signal level = +V for entire bit duration
    If bit = 0:
        Set signal level = -V (or 0V) for entire bit duration
    Advance to next bit period

Decoding Algorithm:

For each bit period:
    Sample signal level at center of bit period
    If sample > threshold:
        Decoded bit = 1
    Else:
        Decoded bit = 0

Implementation Simplicity:

Inexpensive to implement in hardware
Easy to understand and troubleshoot
Suitable for short-distance, low-speed communication

Historical Significance

NRZ-I (NRZ-Inverted): Differential Encoding

Binary 1 → Signal transition (inversion) at the beginning of the bit period
Binary 0 → No transition; signal level remains unchanged

This is a form of differential encoding, where information is encoded in the change between states rather than the states themselves.

Why 'Inverted'?

Signal Characteristics:

In NRZ-I encoding:

A transition always occurs at the beginning of a bit period containing '1'
No transition occurs for '0' bits
Long sequences of zeros produce a flat signal (just like NRZ-L sequences of same bits)
Long sequences of ones produce regular transitions at every bit boundary

Key Insight:

Converting Mermaid diagram...

NRZ-I Encoding Rules
Binary Value	Signal Behavior	Effect on Level	Synchronization Impact
1	Transition at bit start	Level inverts: +V ↔ -V	Provides clock edge for timing recovery
0	No transition	Level unchanged	No timing information; potential clock drift

Encoding Algorithm:

Initialize: current_level = +V (or -V, arbitrary starting point)

For each bit in the data stream:
    If bit = 1:
        current_level = invert(current_level)  // +V → -V or -V → +V
    // If bit = 0: do nothing, level stays the same
    Output current_level for entire bit duration
    Advance to next bit period

Decoding Algorithm:

For each bit period:
    Compare signal level at bit start with previous level
    If transition detected:
        Decoded bit = 1
    Else:
        Decoded bit = 0

Polarity Independence

NRZ-L vs NRZ-I: A Detailed Comparison

Comprehensive NRZ-L vs NRZ-I Comparison
Characteristic	NRZ-L	NRZ-I
Encoding Type	Level encoding (voltage = bit)	Differential encoding (transition = 1)
Polarity Sensitivity	Highly sensitive; swapped wires corrupt all data	Polarity independent; swapped wires still work
Synchronization	No synchronization capability built-in	Partial; '1' bits provide clock transitions
DC Component	Present; long runs of 1s or 0s create DC bias	Present; long runs of 0s create DC bias
Baseline Wandering	Severe for unequal 1s and 0s	Moderate; only 0-runs cause issues
Implementation	Simpler; direct bit-to-voltage mapping	Slightly complex; requires state tracking
Error Impact	Single bit error affects one bit	Single transition error may affect subsequent bits
Bandwidth	Efficient; minimum bandwidth = bit rate / 2	Same efficiency as NRZ-L
Common Usage	RS-232, EIA-232, short-distance serial	USB 2.0 (low/full speed), magnetic recording

NRZ-L Advantages

•Simplest possible encoding logic
•Minimal hardware requirements
•Easy signal analysis and debugging
•Single-bit error isolation
•Widely understood and documented

NRZ-I Advantages

•Polarity independent operation
•Self-clocking for data with many 1s
•Better for twisted pair cables
•Easier clock recovery in some scenarios
•Foundation for more advanced differential schemes

Critical Limitation: Both Schemes Struggle with Long Runs

Bandwidth Analysis and Spectral Properties

Theoretical Bandwidth:

For NRZ encoding at bit rate R bits per second:

Minimum bandwidth (ideal case): B = R/2 Hz
Practical bandwidth: B ≈ R Hz (to preserve signal shape adequately)

Spectral Energy Distribution:

The frequency spectrum of an NRZ signal depends on the data pattern:

Data Pattern	Dominant Frequency	Signal Characteristic
Alternating (101010...)	R/2 Hz	Maximum transitions, best for sync
Random 50/50 mix	Spread around R/2 Hz	Typical case
Long runs (111...000...)	Near DC (0 Hz)	Worst case for coupling

nrz_bandwidth_demo.py
Python
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
import numpy as np
import matplotlib.pyplot as plt
from scipy import fft
 
def generate_nrz_l_signal(bits, samples_per_bit=100):
    """Generate NRZ-L signal from binary data."""
    signal = np.array([])
    for bit in bits:
        level = 1.0 if bit == 1 else -1.0
        signal = np.append(signal, np.ones(samples_per_bit) * level)
    return signal
 
def analyze_spectrum(signal, bit_rate, samples_per_bit):
    """Compute frequency spectrum of NRZ signal."""
    sample_rate = bit_rate * samples_per_bit
    n = len(signal)
    freq = np.fft.fftfreq(n, 1/sample_rate)[:n//2]
    magnitude = np.abs(np.fft.fft(signal))[:n//2]
    return freq, magnitude
 
# Example: Compare different data patterns
bit_rate = 1000  # 1000 bps
samples = 100
 
# Alternating pattern: maximum transitions
alternating = [1, 0, 1, 0, 1, 0, 1, 0, 1, 0] * 10
# Long runs: minimum transitions  
long_runs = [1]*50 + [0]*50
# Random: typical case
random_bits = list(np.random.randint(0, 2, 100))
 
# Generate signals and analyze spectra
for pattern, name in [(alternating, "Alternating"), 
                       (long_runs, "Long Runs"),
                       (random_bits, "Random")]:
    signal = generate_nrz_l_signal(pattern, samples)
    freq, mag = analyze_spectrum(signal, bit_rate, samples)
    print(f"{name}: Peak frequency at {freq[np.argmax(mag)]:.1f} Hz")
    # Peak should be near bit_rate/2 for alternating pattern

Bandwidth Efficiency Trade-off

Real-World Applications and Standards

Despite their limitations, NRZ encoding schemes remain in active use across numerous applications. Understanding where and why they're used provides insight into practical engineering trade-offs.

NRZ-L Applications

•RS-232/EIA-232 Serial Communication — The classic serial port standard uses NRZ-L encoding. Start and stop bits provide framing, and the relatively low data rates (typically 9600-115200 bps) minimize synchronization issues.
•TTL/CMOS Digital Logic — Internal signals within digital circuits use level-based encoding. The short distances and synchronous clock distribution eliminate the need for self-clocking.
•Parallel Data Buses — Legacy parallel interfaces (parallel ports, IDE cables) use NRZ-L for each data line, relying on a separate clock line for synchronization.
•UART Communication — Universal Asynchronous Receiver/Transmitter chips use NRZ-L with start/stop bits for asynchronous serial communication.
•I²C (in terms of data encoding) — While I²C uses complex protocols, the underlying bit encoding follows NRZ principles with external clock.

NRZ-I (Differential) Applications

•USB 2.0 (Low and Full Speed) — Uses NRZI encoding with bit stuffing (inserting a 0 after six consecutive 1s) to guarantee regular transitions for clock recovery.
•Magnetic Recording (Hard Drives) — Traditional magnetic storage used NRZ variants because the read head detects flux transitions more reliably than absolute polarities.
•FDDI (Fiber Distributed Data Interface) — The 100 Mbps fiber network used NRZI encoding combined with 4B/5B coding to ensure adequate transitions.
•IrDA (Infrared Data) — Infrared communication uses NRZI-like encoding where pulses represent ones, leveraging the differential nature for noise immunity.
•Certain Industrial Protocols — Many industrial communication standards use differential NRZ for its noise immunity on long cable runs.

Why NRZ Persists

Implementation Considerations

Implementing NRZ encoding and decoding requires attention to several practical considerations that textbooks often gloss over.

Voltage Level Selection:

The choice of voltage levels affects:

Signal-to-noise ratio (SNR): Larger voltage swings improve noise immunity but increase power consumption
Power consumption: Mobile and embedded devices often use reduced voltage swings (1.8V or 1.2V logic)
Compatibility: Equipment must agree on voltage levels or use level shifters

Common Voltage Configurations:

NRZ Voltage Level Standards
Standard	Logic 1 Level	Logic 0 Level	Application
TTL	+2.4V to +5V	0V to +0.8V	Legacy digital logic
LVTTL	+2.0V to +3.3V	0V to +0.8V	Modern logic ICs
RS-232	-3V to -15V	+3V to +15V	Serial communication
RS-485	Differential ±1.5V to ±6V	Differential	Industrial/long-distance
LVDS	±350mV differential	Common mode ~1.2V	High-speed differential

Timing and Sampling:

Reliable NRZ decoding depends critically on:

Sample Point Selection: The receiver samples the signal at the center of each bit period. Sampling too early or late increases error probability, especially with timing drift.
Clock Accuracy: Without self-synchronization, receiver and transmitter clocks must match closely. A 1% clock mismatch accumulates to half a bit period error after just 50 bits.
Edge Detection vs. Level Sampling: Some receivers use edge-triggered timing recovery (for NRZ-I) while others use level sampling (for NRZ-L).

Practical Clock Tolerance Calculation:

For reliable reception of N bits:
Maximum clock difference = (0.5 × bit_period) / N

Example: To receive 10 bits reliably:
Max difference = 0.5 / 10 = 5% clock tolerance

Example: To receive 100 bits (typical UART frame with start/stop):
Max difference = 0.5 / 100 = 0.5% clock tolerance

Crystal Accuracy Matters

Summary: The Foundation of Line Coding

We've thoroughly examined the two fundamental NRZ encoding schemes that form the starting point for understanding all line coding techniques.

Key Takeaways

•Line coding translates bits to signals — It bridges the gap between abstract binary data and physical transmission media.
•NRZ-L uses voltage levels — Binary values directly correspond to high or low voltage levels; simple but polarity-sensitive.
•NRZ-I uses transitions — Binary 1 triggers a transition; polarity-independent but still struggles with long zero runs.
•Bandwidth efficiency is excellent — NRZ requires only R/2 Hz minimum bandwidth for R bps, making it spectrally efficient.
•Synchronization is the Achilles' heel — Neither scheme provides reliable self-synchronization, limiting their standalone use.
•Real-world use continues — Despite limitations, NRZ remains useful where simplicity is valued and sync is handled externally (RS-232, USB 2.0 with bit stuffing, etc.).

What's Next:

Page Complete