RTOS Examples

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

FreeRTOS/
├── Source/
│   ├── tasks.c              # Task management (create, delete, scheduling)
│   ├── queue.c              # Queue implementation (basis for all IPC)
│   ├── list.c               # Generic linked list (internal data structure)
│   ├── timers.c             # Software timer management
│   ├── event_groups.c       # Event flag groups
│   ├── stream_buffer.c      # Lightweight message buffers
│   ├── croutine.c           # Co-routines (legacy, rarely used)
│   │
│   ├── portable/            # Architecture-specific code
│   │   ├── GCC/
│   │   │   ├── ARM_CM4F/    # Cortex-M4F port
│   │   │   │   ├── port.c       # Context switching, tick ISR
│   │   │   │   └── portmacro.h  # Architecture definitions
│   │   │   ├── ARM_CM7/     # Cortex-M7 port
│   │   │   └── ...          # Other GCC ports
│   │   │
│   │   └── MemMang/         # Memory allocation schemes
│   │       ├── heap_1.c     # Static allocation only
│   │       ├── heap_2.c     # Best fit, no coalescence
│   │       ├── heap_3.c     # Wraps standard malloc
│   │       ├── heap_4.c     # First fit with coalescence
│   │       └── heap_5.c     # heap_4 with multiple regions
│   │
│   └── include/             # Portable header files
│       ├── FreeRTOS.h       # Main configuration header
│       ├── task.h           # Task API declarations
│       ├── queue.h          # Queue API declarations
│       └── ...              # Other API headers
│
└── FreeRTOSConfig.h         # Project-specific configuration (user creates)

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44

typedef struct tskTaskControlBlock {
    // Stack pointer - MUST be first member for context switch
    volatile StackType_t *pxTopOfStack;
    
    // List management for ready/blocked/suspended lists
    ListItem_t xStateListItem;
    ListItem_t xEventListItem;
    
    // Task priority (0 = lowest, configMAX_PRIORITIES-1 = highest)
    UBaseType_t uxPriority;
    
    // Stack memory region
    StackType_t *pxStack;
    
    // Task name for debugging
    char pcTaskName[ configMAX_TASK_NAME_LEN ];
    
    // MPU settings (if configUSE_MPU_SUPPORT == 1)
    #if ( portUSING_MPU_WRAPPERS == 1 )
        xMPU_SETTINGS xMPUSettings;
    #endif
    
    // Stack overflow detection
    #if ( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ... )
        StackType_t *pxEndOfStack;
    #endif
    
    // Critical section nesting count
    #if ( portCRITICAL_NESTING_IN_TCB == 1 )
        UBaseType_t uxCriticalNesting;
    #endif
    
    // Task notification values (up to configTASK_NOTIFICATION_ARRAY_ENTRIES)
    #if ( configUSE_TASK_NOTIFICATIONS == 1 )
        volatile uint32_t ulNotifiedValue[ configTASK_NOTIFICATION_ARRAY_ENTRIES ];
        volatile uint8_t ucNotifyState[ configTASK_NOTIFICATION_ARRAY_ENTRIES ];
    #endif
    
    // Runtime statistics
    #if ( configGENERATE_RUN_TIME_STATS == 1 )
        configRUN_TIME_COUNTER_TYPE ulRunTimeCounter;
    #endif
    
} tskTCB;

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33

// Task function prototype
void vSensorTask(void *pvParameters);
 
// Task creation with all parameters
TaskHandle_t xSensorTaskHandle = NULL;
 
BaseType_t xReturned = xTaskCreate(
    vSensorTask,           // Task function pointer
    "SensorTask",          // Task name (for debugging)
    configMINIMAL_STACK_SIZE * 2,  // Stack depth in words
    (void *)&sensorConfig, // Parameter passed to task
    tskIDLE_PRIORITY + 2,  // Priority (0 = lowest)
    &xSensorTaskHandle     // Task handle output (optional)
);
 
if (xReturned != pdPASS) {
    // Task creation failed - likely heap exhausted
    configASSERT(0);
}
 
// Static allocation alternative (no heap required)
StaticTask_t xTaskBuffer;
StackType_t xStack[256];
 
xTaskCreateStatic(
    vSensorTask,
    "SensorTask",
    256,                    // Stack size in words
    NULL,
    tskIDLE_PRIORITY + 2,
    xStack,                 // Pre-allocated stack
    &xTaskBuffer            // Pre-allocated TCB
);

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54

// Create a queue holding 10 sensor readings
typedef struct {
    uint32_t timestamp;
    int16_t  temperature;
    uint16_t sensorId;
} SensorReading_t;
 
QueueHandle_t xSensorQueue = xQueueCreate(10, sizeof(SensorReading_t));
 
// Producer task: sends sensor readings
void vSensorProducerTask(void *pvParameters) {
    SensorReading_t reading;
    
    for (;;) {
        reading.timestamp = xTaskGetTickCount();
        reading.temperature = readTemperatureSensor();
        reading.sensorId = SENSOR_ID_TEMP_1;
        
        // Block up to 100ms if queue is full
        if (xQueueSend(xSensorQueue, &reading, pdMS_TO_TICKS(100)) != pdPASS) {
            // Queue full - log or handle overflow
            incrementOverflowCounter();
        }
        
        vTaskDelay(pdMS_TO_TICKS(50));  // 20 Hz sampling
    }
}
 
// Consumer task: processes sensor readings
void vSensorConsumerTask(void *pvParameters) {
    SensorReading_t reading;
    
    for (;;) {
        // Block indefinitely until reading available
        if (xQueueReceive(xSensorQueue, &reading, portMAX_DELAY) == pdPASS) {
            processSensorReading(&reading);
        }
    }
}
 
// ISR-safe queue send (for interrupt context)
void SENSOR_IRQHandler(void) {
    SensorReading_t reading;
    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
    
    reading.timestamp = xTaskGetTickCountFromISR();
    reading.temperature = SENSOR->DATA_REG;
    reading.sensorId = SENSOR_ID_TEMP_1;
    
    xQueueSendFromISR(xSensorQueue, &reading, &xHigherPriorityTaskWoken);
    
    // Yield to higher-priority task if one was woken
    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

// Create a mutex for shared I2C bus access
SemaphoreHandle_t xI2CMutex = xSemaphoreCreateMutex();
 
// Protected I2C transaction
BaseType_t xPerformI2CTransaction(uint8_t addr, uint8_t *data, size_t len) {
    BaseType_t xResult = pdFAIL;
    
    // Acquire mutex with 100ms timeout
    // If a lower-priority task holds this mutex, its priority will be
    // temporarily raised to match the calling task's priority
    if (xSemaphoreTake(xI2CMutex, pdMS_TO_TICKS(100)) == pdTRUE) {
        
        // Critical section - exclusive I2C access
        i2c_start();
        xResult = i2c_write(addr, data, len);
        i2c_stop();
        
        // MUST release mutex - failing to do so permanently blocks other tasks
        xSemaphoreGive(xI2CMutex);
    }
    
    return xResult;
}
 
// Multiple tasks can safely call xPerformI2CTransaction() concurrently

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27

// Block header structure (8 bytes on 32-bit systems)
typedef struct A_BLOCK_LINK {
    struct A_BLOCK_LINK *pxNextFreeBlock;  // Next free block in list
    size_t xBlockSize;                      // Size including header
} BlockLink_t;
 
// Memory layout after several allocations:
//
// |------ Heap Memory ----------------------------------------------|
// |                                                                 |
// | [HDR|Allocated] [HDR|    FREE    ] [HDR|Allocated] [HDR| FREE ] |
// |      Task A            500 bytes       Queue           200 bytes|
// |                            ↓                             ↓      |
// |                      pxFirstFreeBlock ──────────────→ pxEnd     |
// |                                                                 |
// |-----------------------------------------------------------------|
 
// Allocation process:
// 1. Walk free list to find first block >= requested size + header
// 2. If block significantly larger, split and return remainder to list
// 3. Remove allocated portion from free list
// 4. Return pointer to usable memory (after header)
 
// Deallocation process:
// 1. Insert freed block back into free list (sorted by address)
// 2. Check if adjacent to previous free block → merge
// 3. Check if adjacent to next free block → merge

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

// Define heap regions before any FreeRTOS calls
// Typically in startup code or main() before vTaskStartScheduler()
 
// Memory regions available on STM32F4
extern uint8_t __heap_start__;  // From linker script
extern uint8_t __heap_end__;
 
const HeapRegion_t xHeapRegions[] = {
    // Region 1: Internal SRAM (128KB)
    { (uint8_t *)&__heap_start__, (size_t)(&__heap_end__ - &__heap_start__) },
    
    // Region 2: CCM RAM (64KB, close-coupled for fast access)
    { (uint8_t *)0x10000000, 64 * 1024 },
    
    // Region 3: External SDRAM (if configured)
    { (uint8_t *)0xC0000000, 8 * 1024 * 1024 },
    
    // Terminate list with NULL
    { NULL, 0 }
};
 
int main(void) {
    // Initialize heap before any FreeRTOS calls
    vPortDefineHeapRegions(xHeapRegions);
    
    // Now create tasks, queues, etc.
    xTaskCreate(...);
    
    vTaskStartScheduler();
    
    for (;;); // Should never reach here
}

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
 
/* Scheduler Configuration */
#define configUSE_PREEMPTION                    1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
#define configUSE_TICKLESS_IDLE                 0  // Enable for low power
#define configCPU_CLOCK_HZ                      ( 168000000UL )  // 168 MHz STM32F4
#define configTICK_RATE_HZ                      ( 1000 )  // 1ms tick
#define configMAX_PRIORITIES                    ( 7 )
#define configMINIMAL_STACK_SIZE                ( 128 )
#define configTOTAL_HEAP_SIZE                   ( 32 * 1024 )
 
/* Feature Inclusion */
#define configUSE_MUTEXES                       1
#define configUSE_RECURSIVE_MUTEXES             1
#define configUSE_COUNTING_SEMAPHORES           1
#define configUSE_QUEUE_SETS                    0
#define configUSE_TASK_NOTIFICATIONS            1
#define configTASK_NOTIFICATION_ARRAY_ENTRIES   3
#define configUSE_TIMERS                        1
#define configTIMER_TASK_PRIORITY               ( configMAX_PRIORITIES - 1 )
#define configTIMER_QUEUE_LENGTH                10
#define configTIMER_TASK_STACK_DEPTH            ( configMINIMAL_STACK_SIZE * 2 )
 
/* Memory Allocation */
#define configSUPPORT_STATIC_ALLOCATION         1
#define configSUPPORT_DYNAMIC_ALLOCATION        1
 
/* Hook Functions */
#define configUSE_IDLE_HOOK                     1
#define configUSE_TICK_HOOK                     0
#define configUSE_MALLOC_FAILED_HOOK            1
#define configCHECK_FOR_STACK_OVERFLOW          2
 
/* Debug and Statistics */
#define configUSE_TRACE_FACILITY                1
#define configUSE_STATS_FORMATTING_FUNCTIONS    1
#define configGENERATE_RUN_TIME_STATS           1
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()  configureTimerForRunTimeStats()
#define portGET_RUN_TIME_COUNTER_VALUE()        getRunTimeCounterValue()
 
/* Cortex-M Specific */
#define configPRIO_BITS                         4  // STM32 uses 4 priority bits
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
#define configKERNEL_INTERRUPT_PRIORITY         ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#define configMAX_SYSCALL_INTERRUPT_PRIORITY    ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
 
/* Assert for development */
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for(;;); }
 
/* API function inclusion */
#define INCLUDE_vTaskPrioritySet                1
#define INCLUDE_uxTaskPriorityGet               1
#define INCLUDE_vTaskDelete                     1
#define INCLUDE_vTaskSuspend                    1
#define INCLUDE_xResumeFromISR                  1
#define INCLUDE_vTaskDelayUntil                 1
#define INCLUDE_vTaskDelay                      1
#define INCLUDE_xTaskGetSchedulerState          1
#define INCLUDE_uxTaskGetStackHighWaterMark     1
 
#endif /* FREERTOS_CONFIG_H */

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37

// ISR-safe task notification for deferred processing
TaskHandle_t xUARTTaskHandle;
 
// Runs in interrupt context - keep FAST
void USART1_IRQHandler(void) {
    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
    
    if (USART1->SR & USART_SR_RXNE) {
        uint8_t byte = USART1->DR;  // Read clears interrupt
        
        // Minimal work in ISR: just buffer the byte
        rxBuffer[rxHead++] = byte;
        rxHead &= RX_BUFFER_MASK;  // Circular buffer
        
        // Wake processing task
        vTaskNotifyGiveFromISR(xUARTTaskHandle, &xHigherPriorityTaskWoken);
    }
    
    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
 
// UART processing task - handles heavy lifting
void vUARTProcessingTask(void *pvParameters) {
    for (;;) {
        // Block until ISR signals data available
        ulTaskNotifyTake(pdTRUE, portMAX_DELAY);
        
        // Process all buffered bytes
        while (rxTail != rxHead) {
            uint8_t byte = rxBuffer[rxTail++];
            rxTail &= RX_BUFFER_MASK;
            
            // Heavy processing here (parsing, validation, etc.)
            processReceivedByte(byte);
        }
    }
}

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67

// Resource handler for SPI flash
typedef enum {
    FLASH_CMD_READ,
    FLASH_CMD_WRITE,
    FLASH_CMD_ERASE
} FlashCommand_t;
 
typedef struct {
    FlashCommand_t command;
    uint32_t address;
    uint8_t *buffer;
    size_t length;
    TaskHandle_t requestingTask;
    BaseType_t result;
} FlashRequest_t;
 
QueueHandle_t xFlashQueue;
static SemaphoreHandle_t xFlashComplete;
 
// Flash handler task - exclusive SPI access
void vFlashHandlerTask(void *pvParameters) {
    FlashRequest_t request;
    
    for (;;) {
        if (xQueueReceive(xFlashQueue, &request, portMAX_DELAY) == pdPASS) {
            switch (request.command) {
                case FLASH_CMD_READ:
                    request.result = spiFlashRead(request.address, 
                                                   request.buffer, 
                                                   request.length);
                    break;
                case FLASH_CMD_WRITE:
                    request.result = spiFlashWrite(request.address, 
                                                    request.buffer, 
                                                    request.length);
                    break;
                case FLASH_CMD_ERASE:
                    request.result = spiFlashErase(request.address);
                    break;
            }
            
            // Notify requesting task of completion
            xTaskNotify(request.requestingTask, 
                       request.result, 
                       eSetValueWithOverwrite);
        }
    }
}
 
// Client API - called from any task
BaseType_t flashRead(uint32_t addr, uint8_t *buf, size_t len) {
    FlashRequest_t request = {
        .command = FLASH_CMD_READ,
        .address = addr,
        .buffer = buf,
        .length = len,
        .requestingTask = xTaskGetCurrentTaskHandle()
    };
    
    xQueueSend(xFlashQueue, &request, portMAX_DELAY);
    
    // Wait for completion notification
    uint32_t result;
    xTaskNotifyWait(0, ULONG_MAX, &result, portMAX_DELAY);
    
    return (BaseType_t)result;
}